To interface bare semiconductor dies to a support surface such as a printed circuit board, there is a need for an appropriate package substrate or interposer to interface and route the semiconductor dies within a package, such as a hall grid array (BGA) package, chip scale package (CSP), or system-in-package (SiP), to the printed circuit board. Organic substrates such as Bismaleimide-Triazine (BT), Ajinomoto Build-up Film (ABF), FR-4 laminates, E679-FBG, ECL4785GS, and E700 are conventionally used with laminated conductor or build-up layers. With their long use in the industry, organic substrates provide a tow cost and well-understood material for package substrates.
Despite their advantages, organic substrates have particular drawbacks for specific package requirements. The organic substrate must be built using fabrication technology according to stringent design rules, raising the cost of fabrication where multiple contact pad pitches are utilized. The use of organic substrates also impose limitations for the minimum size of interconnect trace line widths, line to line spacing, and contact pad pitch, hindering integration of dies with high density I/O arrays. While non-organic substrates such as low-temperature co-fired ceramic (LTCC) substrates can provide high-density wiring, organic substrates still offer substantial cost, availability, thinness, and process advantages.